IC packaging has been behind the inherent ability of the IC chip. We hope to die and package the performance gap between the chip decreases, which promoted the new design and new packaging technology. In the new package design, multi-chip package (CSP) contains more than one chip, each deposited on top of each other by wire bonding and flip chip design (in flip-chip wire bonding, flip chip on-line welding , or on-line welding wire bonding) to achieve the interconnection between the chip, further reducing the weight and footprint of the device).
As the size and cost advantages, wafer level CSP (Wafer-levelcap) will be further developed, this technology is cut into small squares on the chip (chip) before they form the first level on-chip interconnect and packaging I / O terminal, which not only shorten the manufacturing cycle, the I / O terminals are divided into area-array type and peripheral type (according to I / O terminals of the distribution) of two types; the former, EIAJ 0.8mm terminal pitch below the dimensions of 4mm -21mm ultra-small package as the standard, mainly for logic and memory components, which are so SON and QFN leadless terminals with neighboring small envelope, primarily for low memory and logic devices. CSP since its inception in the early 1990s, proposed a variety of structural forms, now face an array type FBGA the mainstream, the first generation of plastic FBGA type of face-down type, the second generation is set FBGA type of surface with down-type, have adopted the plastic lead frame module, package, and a new generation of the FBGA as carrier for transmission based on the crystal, cut (dash) of the final assembly process, that is, WLP, instead of the previously used connection technology package ( wire bonding, TAB and flip chip solder), but before the split in the dash, before the process of routing using semiconductor technology, the chip pad and connected to an external terminal, followed by solder ball connections and electrical test and so the chip state of completion, and finally crossed the line forced split. Obviously with the WLP is produced by way of the actual chip size of the FBGA, no difference between appearance and FC.
In short, PBGA, TBGA, FBGA, (CSP) and FC is the development trend in today's IC packaging. Tables 1 and 2, respectively, shows the trend of development of these packages. In the first 15 years of the 21st century, will be the third representative of the rapid development of surface mount package, around the high-density assembly, packaging structure, the diversification of the early 21st century will be the most significant of the IC package characteristics. LSI chip stacked package, ring package: There will be a new 3D packaging, optical an electronics interconnect, optical surface mount technology will flourish. System on Chip (SOC) system-level packaging and MCM (MCM / SIP) design tool with improved wiring density increase, new substrate materials used, and the popularity of the economy KGD supply, will be further developed into practical and stage.
With the industrial and consumer electronics market for electronic devices smaller, high-performance, high reliability, safety and electromagnetic compatibility requirements, the performance of electronic circuits have made new demands, since the 90s from the 20th century, the rule type further miniaturization of components, multi-layered, high-capacity, high pressure and high-performance direction, but also with the SMT of all electronic equipment in the popularization and application, worldwide use of chip components of the rapid increase in consumption of films now Component only 1 trillion, the ratio of passive components is generally greater than the IC 20 due to need such a large number of discrete components, so the discrete components dominate the size of the final PCB assembly; In addition, the chip passive components, the rapid increase in the amount of bottlenecks in the placement process by the placement of chip components more difficult to resolve, resulting in loss of production line balancing, capacity utilization decreased, costs, and chip components supply Shijian occupy 30% of the production line time, seriously affecting the production will increase. Effective way to solve these problems is. To achieve the integration of passive components.
Integrated passive components are the following package:
Array: the number of one type of passive components integrated together to form the terminal area array package;
Network: the number of resistors and capacitors integrated mixed together to form terminals around the package;
Mixed: some of the active devices and passive components for hybrid integrated package;
Embedded: the embedded passive components integrated in the PCB or other substrate;
Integrated mixed: the integration of passive components packaged in TSOP or QFP format.
Promote the use of these passive package can effectively solve the Mount: bottlenecks, improve SMT production line balancing, reduce costs, increase productivity, improve packing density.